1. Technical Field
The present invention relates to a potential comparator and a test apparatus. More particularly, the present invention relates to a potential comparator that derives a magnitude relation between a potential difference between a pair of signals forming a differential signal output from a test object and a predetermined threshold potential, and a test apparatus.
2. Related Art
Conventionally, there has been known a test apparatus that tests characteristics or the like of an electronic circuit. Specifically, such a test apparatus compares an electrical signal output from the electronic circuit which is a test object with a predetermined threshold voltage by means of a potential comparator, and decides a quality of the electronic circuit on the basis of a comparison result. Therefore, reliability of a test by the test apparatus is largely dependent on comparison precision of the potential comparator that performs electric potential comparison, and thus the potential comparator constituting the test apparatus is extremely important from the viewpoint of the reliability of a test.
Meanwhile, a technique using a so-called differential transmission scheme is proposed instead of a conventional single end transfer, in order to speed up a transfer rate and improve noise tolerance. The differential transmission scheme is a technique performing a signal transfer by means of two transmission lines, and specifically performs a decision of High or Low on the basis of a potential difference between two electrical signals transmitted through two transmission lines. In response to the increase of an electronic circuit using such a differential transmission scheme, realization of a test apparatus including a potential comparator corresponding to a differential transmission scheme is requested even in a field of a test apparatus that performs a characteristic test or the like on the electronic circuit.
As an example of a test apparatus corresponding to a differential transmission scheme, there is an apparatus having a configuration that performs electric potential comparison on each of two electrical signals constituting a differential signal. However, in case of an apparatus with this configuration, there is a problem that the number of potential comparators that are required increases, compared to a test in a single end transfer. Moreover, for example, when common noises get mixed in the respective electrical signals (in other words, when there is not a problem from the viewpoint of signal transmission by the cancel of noises when a potential difference between electrical signals has been derived), the respective electrical signals may have transfer errors, and thus the reliability of a test causes problems.
For this reason, as an example of another test apparatus, there has been known an apparatus that has therein an analog subtracter for deriving a potential difference between input electrical signals and similarly performs potential comparison on a difference signal derived by the analog subtracter and a single end signal. An apparatus having this configuration does not have the above-described problem, and can apply a technique of a potential comparator related to an electronic circuit using a single end transfer method. Moreover, as an example of another test apparatus, there has been known a test apparatus that includes an offset addition section for uniformly changing (offsetting) electric potential of one side of a differential signal and a potential comparator for comparing one electrical signal after the change and the other electrical signal (for example, see Patent Document 1).
[Patent Document 1] Japanese Patent Application Publication No. 1997-197018
However, a conventional test apparatus has a problem that its structure is complicated. In other words, as a concrete structure of an analog subtracter, when a differential signal to be subtracted particularly has a high-speed and wide potential variation range, a degree of difficulty of an electronic circuit constituting a subtracter that favorably maintains linearity is high and a structure thereof becomes complicated.
Moreover, a test apparatus that offsets one electric potential of a differential signal similarly has a complicated structure. In other words, since some kind of feedback mechanism is required from a point of view stabilizing an offset voltage highly, it is necessary that the conventional test apparatus newly has a separate feedback mechanism or the like in addition to a circuit described in FIG. 2 in Patent Document 1, and thus its structure becomes complicated similarly to including an analog subtracter. Moreover, since a test apparatus using an offset addition section has a configuration that the offset addition section includes an emitter-follower as apparent from FIG. 2 in Patent Document 1, there is a problem that a response to a rising edge and a falling edge of a waveform becomes dissymmetric and nonlinearity related to an electrical characteristic of a transistor as a component has an influence on precision of an offset voltage when an input signal is speeded up.